`timescale 1ns / 1ps

module DM(
    input clk,
    input reset,
    input en,
    input [31:0] A,
    output [31:0] DR,
    input [31:0] Din,
    input [31:0] addr,
    input [1:0] store
    );

    reg [31:0] word [0:4095];

    assign DR = word[A[13:2]];

    initial begin :initt
        integer i;
        for(i = 0; i < 4096; i = i + 1)
            word[i] = 0;
    end

    always @(posedge clk) begin: alww
        if(reset) begin: rres
            integer i;
            for(i = 0; i < 4096; i = i + 1)
                word[i] = 0;
        end
        else if(en) begin
            case(store)
                2'b00: word[A[13:2]] = Din;    
                2'b01: word[A[13:2]][16*A[1]+:16] = Din[15:0];
                2'b10: word[A[13:2]][8*A[1:0]+:8] = Din[7:0];
                default:;
            endcase
            $display("%d@%h: *%h <= %h", $time, addr, {A[31:2], 2'b00}, word[A[13:2]]);
        end
    end

endmodule
